Monday 21 October 2013

RTU 3rd sem Electronics And Communication Engineering B.Tech. Syllabus Circuit Analysis & Synthesis

3EC4A Circuit Analysis & Synthesis


Unit I

NETWORK THEOREMS AND ELEMENTS - Thevenin’s, Norton’s,
Reciprocity, Superposition, Compensation, Miller’s, Tellegen’s and maximum
power transfer theorems. Networks with dependent sources. Inductively coupled
circuits – mutual inductance, coefficient of coupling and mutual inductance between
portions of same circuits and between parallel branches. Transformer equivalent,
inductively and conductively coupled circuits

Unit II

TRANSIENTS ANALYSIS - Impulse, Step, Ramp and sinusoidal response
analysis of first order and second order circuits. Time domain & transform domain
(frequency, Laplace) analysis. Initial and final value theorems. Complex periodic
waves and their analysis by Fourier analysis. Different kind of symmetry. Power in a
circuit

Unit III

NETWORK FUNCTIONS - Terminals and terminal pairs, Driving point
impedance transfer functions, Poles and zeros, Restrictions on pole and zero location
in s-plane. Time domain behavior from pole and zero plot, Procedure for finding
network functions for general two terminal pair networks, Stability & causality,
Hurwitz polynomial, positive real function

Unit IV

TWO PORT NETWORKS - Two Port General Networks: Two port parameters
(impedance, admittance, hybrid, ABCD and S parameters) and their inter relations.
Equivalence of two ports. Transformer equivalent, interconnection of two port
networks. The ladder network, image impedance, image transfer function,
application to L-C network, attenuation and phase shift in symmetrical T and pi ( )
networks.

Unit V

NETWORK SYNTHESIS - The four-reactance function forms, specification for
reactance function. Foster form of reactance networks. Cauer form of reactance
networks Synthesis of R-L and R-C and L-C networks in Foster and Cauer forms

RTU 3rd sem Electronics And Communication Engineering B.Tech. Syllabus Business Entrepreneurship

3EC11A Business Entrepreneurship


1. INTRODUCTION TO ENTREPRENEURSHIP - Concept and need,
Entrepreneurship and innovation, Entrepreneurship and economic growth.

2. ENTREPRENEURIAL COMPETENCIES - Leadership, Decision making,
Motivation, Risk taking.

3. BUSINESS ENTERPRISE PLANNING - Identification of business opportunity,
Idea generation, Demand estimation, Preparation of project report, Feasibility
analysis.

4. INTELLECTUAL PROPERTY RIGHTS, Patents, Taxation- Central excise &
Sales tax, VAT

5. GOVERNMENT POLICIES - for Entrepreneurs, Entrepreneurial career
opportunities for Engineers, case studies.

RTU 3rd sem Electronics And Communication Engineering B.Tech. Syllabus Digital Electronics Lab

3EC10A Digital Electronics Lab


1. To verify the truth tables of basic logic gates: AND, OR, NOR, NAND, NOR. Also
to verify the truth table of Ex-OR, Ex-NOR (For 2, 3, & 4 inputs using gates with 2,
3, & 4 inputs)

2. To verify the truth table of OR, AND, NOR, Ex-OR, Ex-NOR realized using NAND
& NOR gates

3. To realize an SOP and POS expression

4. To realize Half adder/ Subtractor & Full Adder/ Subtractor using NAND & NOR
gates and to verify their truth tables

5. To realize a 4-bit ripple adder/ Subtractor using basic Half adder/ Subtractor & basic
Full Adder/ Subtractor.

6. To verify the truth table of 4-to-1 multiplexer and 1-to-4 demultiplexer. Realize the
multiplexer using basic gates only. Also to construct and 8-to-1 multiplexer and 1-
to-8 demultiplexer using blocks of 4-to-1 multiplexer and 1-to-4 demultiplexer

7. Design & Realize a combinational circuit that will accept a 2421 BCD code and
drive a TIL -312 seven-segment display

8. Using basic logic gates, realize the R-S, J-K and D-flip flops with and without clock
signal and verify their truth table

9. Construct a divide by 2, 4 & 8 asynchronous counter. Construct a 4-bit binary
counter and ring counter for a particular output pattern using D flip flop.

10. Perform input/output operations on parallel in/Parallel out and Serial in/Serial out
registers using clock. Also exercise loading only one of multiple values into the
register using multiplexer.
Note: As far as possible, the experiments shall be performed on bread board.
However experiment Nos. 1-4 are to be performed on bread board only

RTU 3rd sem Electronics And Communication Engineering B.Tech. Syllabus Electronic Device Lab

3EC9A Electronic Device Lab


1. Study the following devices: (a) Analog & digital multimeters (b) Function/ Signal
generators (c) Regulated d. c. power supplies (constant voltage and constant current
operations) (d) Study of analog CRO, measurement of time period, amplitude,
frequency & phase angle using Lissajous figures.

2.Plot V-I characteristic of P-N junction diode & calculate cut-in voltage, reverse
Saturation current and static & dynamic resistances.

3. Plot V-I characteristic of zener diode and study of zener diode as voltage regulator.
Observe the effect of load changes and determine load limits of the voltage
regulator.

4. Plot frequency response curve for single stage amplifier and to determine gain
bandwidth product

5. Plot drain current - drain voltage and drain current – gate bias characteristics of field
effect transistor and measure of Idss & Vp

6. Application of Diode as clipper & clamper

7. Plot gain- frequency characteristic of two stage RC coupled amplifier & calculate its
bandwidth and compare it with theoretical value.

8. Plot gain- frequency characteristic of emitter follower & find out its input and output
resistances.

9. Plot input and output characteristics of BJT in CB, CC and CE configurations. Find
their h-parameters

10. Study half wave rectifier and effect of filters on wave. Also calculate theoretical &
practical ripple factor.

11. Study bridge rectifier and measure the effect of filter network on D.C. voltage output
& ripple factor.

RTU 3rd sem Electronics And Communication Engineering B.Tech. Syllabus Computer Programming Lab I

3EC8A Computer Programming Lab-I


1. Write a simple C program on a 32 bit compiler to understand the concept of array
storage, size of a word. The program shall be written illustrating the concept of row
major and column major storage. Find the address of element and verify it with the
theoretical value. Program may be written for arrays upto 4-dimensions.

2. Simulate a stack, queue, circular queue and dequeue using a one dimensional array
as storage element. The program should implement the basic addition, deletion and
traversal operations.

3. Represent a 2-variable polynomial using array. Use this representation to implement
addition of polynomials.

4. Represent a sparse matrix using array. Implement addition and transposition
operations using the representation.

5. Implement singly, doubly and circularly connected linked lists illustrating operations
like addition at different locations, deletion from specified locations and traversal.

6. Repeat exercises 2, 3 & 4 with linked structures.

7. Implementation of binary tree with operations like addition, deletion, traversal.

8. Depth first and breadth first traversal of graphs represented using adjacency matrix
and list.

9. Implementation of binary search in arrays and on linked Binary Search Tree.

10. Implementation of insertion, quick, heap, topological and bubble sorting algorithms.

RTU 3rd sem Electronics And Communication Engineering B.Tech. Syllabus Electronic Instrumentation Workshop

3EC7A Electronic Instrumentation Workshop


1. Identification, Study & Testing of various electronic components : (a) Resistances-
Various types, Colour coding (b) Capacitors-Various types, Coding, (c) Inductors
(d) Diodes (e) Transistors (f) SCRs (g) ICs (h) Photo diode (i) Photo transistor (j)
LED (k) LDR (l) Potentiometers

2. Study of symbols for various Electrical & Electronic Components, Devices, Circuit
functions etc.

3. To study and perform experiment on CRO demonstration kit.

4. Soldering & Desoldering practice.

5. (a) To Design & fabricate a PCB for a Regulated power supply.
(b) Assemble the Regulated power supply using PCB and test it.

6. To study and plot the characteristics of following Opto-Electronic devices –
(a) LED (b) LDR (C) Photovoltatic cell (d) Opto-coupler
(e) Photo diode (f) Photo transistor (g) Solar cell

7. To study the specifications and working of a Transistor radio (AM & FM) kit and
perform measurements on it.

8. To study the specifications and working of a Public address System.

9. To prepare design layout of PCBs using software tools.

10. To fabricate PCB and testing of electronics circuit on PCB.

11. To design and test Switch Mode Power Supply using ICs

12. To study the specifications and working of a DVD Player.

13. To study the specifications and working of LCD TV.

14. To study the specifications and working of LED TV.

RTU 3rd sem Electronics And Communication Engineering B.Tech. Syllabus Advanced Engineering Mathematics I

3EC6A Advanced Engineering Mathematics I


Unit I

LAPLACE TRANSFORM - Laplace transform with its simple properties,
applications to the solution of ordinary and partial differential equations having
constant co-efficients with special reference to the wave and diffusion equations.

Unit II

FOURIER SERIES & Z TRANSFORM – Expansion of simple functions in
fourier series. Half range series, Change of intervals, Harmonic analysis.
Z TRANSFORM - Introduction, Properties, Inverse Z Transform.

Unit III

FOURIER TRANSFORM - Complex form of Fourier Transform and its inverse,
Fourier sine and cosine transform and their inversion. Applications of Fourier
Transform to solution of partial differential equations having constant co-efficient
with specialreference to heat equation and wave equation.

Unit IV

COMPLEX VARIABLES - Analytic functions, Cauchy-Riemann equations,
Elementary conformal mapping with simple applications, Line integral in complex
domain, Cauchy;s theorem. Cauchy’s integral formula.

Unit V

COMPLEX VARIABLES -Taylor’s series Laurent’s series poles, Residues,
Evaluation of simple definite real integrals using the theorem of residues. Simple
contour integration.

RTU 3rd sem Electronics And Communication Engineering B.Tech. Syllabus Electromagnetic Properties of Materials

3EC5A Electromagnetic Properties of Materials


Unit I

DIELECTRICS MATERIALS - Introduction, Polarization, Polarizability,
Different types of polarization, Electronic, ionic, Orientation and space polarization,
frequency and temperature dependence of different polarization, Dielectric loss and
loss tangent, energy store and loss in dynamic polarization, Phenomenon of
spontaneous polarization and ferro-electricity, Ferroelectric hysteresis loop,
Piezoelectricity, piezoelectric materials: Quartz, Rochelle salt and PZT ,
Applications of dielectrics

Unit II

MAGNETIC MATERIALS - Introduction, magnetization, theory of Dia, Para,
Ferro- Ferrimagnetism and antiferromagnetism, Weiss field and magnetic domains,
BH hysteresis loop, soft and hard magnetic materials and their applications,
magnetic energy. Magnetostriction, giant magnetostriction resistor (GMR) and
engineering applications of it. Magnetic spin, new electronic devices based on
magnetic spin

Unit III

SEMI CONDUCTOR MATERIALS - Introduction, Energy band gap structures of
semiconductors, Classifications of semiconductors, Degenerate and nondegenerate
semiconductors, Direct and indirect band gap semiconductors, Electronic properties
of Silicon, Germanium, Compound Semiconductor, Gallium Arsenide, Gallium
phosphide & Silicon carbide, Variation of semiconductor conductivity, resistance
and bandgap with temperature and doping. Thermistors, Sensitors

Unit IV

CONDUCTIVE & SUPERCONDUCTIVE MATERIALS - Electrical properties
of conductive and resistive materials. , Energy bandgap structures of metals,
resistivity of conductors and multiphase solids, Matthiessen’s rule, Important
characteristics and electronic applications of specific conductor & resistance
materials, Superconductor phenomenon, Type I and Type II superconductors.
Theory of superconductors, High temperature superconductors and their
applications.

Unit V

NANOMATERIALS - Introduction, Change in band structure at nano-stage.
Structure of Quantom dots (nano-dots) & Quantom wires, Fabrication &
Characterization of nanomaterials, Structure of single wall and multi-wall carbon
nanotube (CNT), Change in electrical, Electronic and optical properties at nano
stage, Potential applications of nano materials.

RTU 3rd sem Electronics And Communication Engineering B.Tech. Syllabus Digital Electronics

3EC3A Digital Electronics


Unit I

NUMBER SYSTEMS, BASIC LOGIC GATES & BOOLEAN ALGEBRA -
Binary Arithmetic & Radix representation of different numbers. Sign & magnitude
representation, Fixed point representation, complement notation, various codes &
arithmetic in different codes & their inter conversion. Features of logic algebra,
postulates of Boolean algebra, Theorems of Boolean algebra. Boolean function.
Derived logic gates: Exclusive-OR, NAND, NOR gates, their block diagrams and
truth tables. Logic diagrams from Boolean expressions and vica-versa, Converting
logic diagrams to universal logic. Positive, Negative and mixed logic, Logic gate
conversion.

Unit II

DIGITAL LOGIC GATE CHARACTERISTICS - TTL logic gate characteristics.
Theory & operation of TTL NAND gate circuitry. Open collector TTL. Three state
output logic. TTL subfamilies. MOS & CMOS logic families, Realization of logic
gates in RTL, DTL, ECL, C-MOS & MOSFET, Interfacing logic families to one
another

Unit III

MINIMIZATION TECHNIQUES - Minterm, Maxterm, Karnaugh Map, K-map
upto 4 variables, Simplification of logic functions with K-map, conversion of truth
tables in POS and SOP form. Incomplete specified functions, Variable mapping.
Quinn-Mc Klusky minimization techniques.

Unit IV

COMBINATIONAL SYSTEMS - Combinational logic circuit design, half and full
adder, subtractor. Binary serial and parallel adders. BCD adder. Binary multiplier.
Decoder: Binary to Gray decoder, BCD to decimal, BCD to 7-segment decoder.
Multiplexer, Demultiplexer, Encoder. Octal to binary, BCD to excess-3 encoder.
Diode switching matrix. Design of logic circuits by multiplexers, encoders, decoders
and demultiplexers.

Unit V

SEQUENTIAL SYSTEMS - Latches, Flip-flops, R-S, D, J-K, Master Slave flip
flops. Conversions of flip-flops, Counters: Synchronous & Asynchronous ripple and
decade counters, Modulus counter, Skipping state counter, Counter design, State
diagrams and state reduction techniques, Ring counter, Counter applications,
Registers: Buffer register, Shift register.

RTU 3rd sem Electronics And Communication Engineering B.Tech. Syllabus Data Structures & Algorithms

3EC2A Data Structures & Algorithms


Unit I

DEFINITION & CHARACTERISTICS OF ALGORITHMS – Structures,
Difficulties in estimating exact execution time of algorithms, Concept of complexity
of program, Asymptotic notations: Big-Oh, theta, Omega- Definitions and examples,
Determination of time and space complexity of simple algorithms without recursion,
Representing a function in asymptotic notations viz 5n2-6n=(n2)
ARRAYS: Array as storage element, Row major & column major form of arrays,
computation of address of elements of n dimensional array

Unit II

ARRAYS AS STORAGE ELEMENTS for representing polynomial of one or
more degrees for addition & multiplication, Sparse matrices for transposing &
multiplication, stack, queue, Dequeue, Circular queue for insertion and deletion with
condition for over and underflow, Transposition of sparse matrices with algorithms
of varying complexity (Includes algorithms for operations as mentioned)
EVALUATION OF EXPRESSION - Concept of precedence and associativity in
expressions, Difficulties in dealing with infix expressions, Resolving precedence of
operators and association of operands, Postfix & prefix expressions, conversion of
expression from one form to other form using stack (with & without parenthesis),
Evaluation of expression in infix, postfix & prefix forms using stack. Recursion

Unit III

LINEAR LINKED LISTS - Singly, doubly and circularly connected linear linked
lists- insertion, Deletion at/ from beginning and any point in ordered or unordered
lists, Comparison of arrays and linked lists as data structures
Linked implementation of stack, queue and dequeue, Algorithms for of insertion,
deletion and traversal of stack, Queue, Dequeue implemented using linked
structures. Polynomial representation using linked lists for addition, Concepts of
Head Node in linked lists
SEARCHING - Sequential and binary search

Unit IV

NON-LINEAR STRUCTURES - Trees definition, Characteristics concept of child,
Sibling, Parent child relationship etc, Binary tree: different types of binary trees
based on distribution of nodes, Binary tree (threaded and unthreaded) as data
structure, insertion, Deletion and traversal of binary trees, constructing binary tree
from traversal results. Threaded binary Tree. Time complexity of insertion, deletion
and traversal in threaded and ordinary binary trees. AVL tree: Concept of balanced
trees, balance factor in AVL trees, insertion into and deletion from AVL tree,
balancing AVL tree after insertion and deletion. Application of trees for
representation of sets.

Unit V

GRAPHS - Definition, Relation between tree & graph, directed and undirected
graph, representation of graphs using adjacency matrix and list. Depth first and
breadth first traversal of graphs, Finding connected components and spanning tree.
Single source single destination shortest path algorithms
SORTING - Insertion, quick, Heap, Topological and bubble sorting algorithms for
different characteristics of input data. Comparison of sorting algorithms in term of
time complexity,
NOTE:
1. Algorithm for any operation mentioned with a data structure or required to
implement the particular data structure is included in the curriculum.

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